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1 Introduction
1.1 Evolution of VLSI Device Technology
1.2 Scope and Brief Description of the Book

2 Basic Device Physics
2.1 Energy Bands in Silicon
2.2 n-Type and p-Type Silicon
2.3 Carrier Transport in Silicon
2.4 Basic Equations for Device Operation
Exercises

3 p-n Junctions and Metal-Silicon Contacts
3.1 p-n Junctions
3.2 Metal-Silicon Contacts
3.3 High-Field Effects in Reverse-Biased Diodes
Exercises

4 MOS Capactiors
4.1 Energy Band Diagram of an MOS System
4.2 Electrostatic Potential and Charge Distribution in Silicon
4.3 Capacitance-Voltage Characteristics of MOS Capacitors
4.4 Quantum Mechanical Effects in MOS
4.5 Interface States and Charge Traps in Oxide
4.6 High-Field Effects in Oxide and Oxide Degradation
Exercises

5 MOSFETs: Long Channel
5.1 MOSFET I-V Characteristics
5.2 MOSFET Channel Mobility
5.3 MOSFET Threshold Voltage
5.4 MOSFET Capacitance
Exercises

6 MOSFETs: Short Channel
6.1 Short-Channel Effect
6.2 High-Field Transport
6.3 MOSFET Threshold Voltage and Channel Profile Design
6.4 MOSFET Degradation and Breakdown at High Fields
Exercises

7 Silicon-on-Insulator and Double-Gate MOSFETs
7.1 SOI MOSFETs
7.2 Double-Gate and Nanowire MOSFETs
Exercises

8 CMOM Performance Factors
8.1 MOSFET Scaling
8.2 Basic CMOS Circuit Elements
8.3 Parastic Elements
8.4 Sensitivity of CMOS Delay to Device Parameters
8.5 Performance Factor of MOSFETs in RF Ciruits
Exercises

9 Bipolar Devices
9.1 Basic Operation of a Bipolar Transistor
9.2 Ideal Current-Voltage Characteristics
9.3 Measured Characteristics of Typical n-p-n
9.4 Base Transit Time
9.5 Diffusion Capacitance in an Emitter-Base Diode
9.6 Bipolar Device Models for Circuit Analyses
9.7 Breakdown Voltages
Exercises

10 Bipolar Device Design
10.1 Design of the Emitter of a Vertical Bipolar Transistor
10.2 Design of the Base Regin of a Vertical Bipolar Transistor
10.3 Design of the VerticalBipolar Transistor Collector Region
10.4 SiGe-Base Vertical Bipolar Transistors
10.5 Design of Summetric Lateral Bipolar Transistors on SOI
Exercises

11 Bipolar Performance Factors
11.1 Figures of Merit of a Bipolar Transistor
11.2 ECL Circuit and Delay Components
11.3 Speed-versus-Current Chracteristics of Bipolar Transistors
11.4 Vertical-Transistor Optimization from Data Analyses
11.5 Bipolar Device Scling for Logic Circuits
11.6 Vertical-Transistor Design Optimization for RF and Analog Circuits
11.7 Symmetric-Lateral-Transistor Design Tradeoffs and Optimization for RF and Analog Circuits
11.8 Unique Opportunities from Symmetric Lateral Bipolar Transistors
Exercises

12 Memory Devices
12.1 Static Random-Access Memory
12.2 Dynamic Random-Access Memory
12.3 Nonvolatie Memory
Exercise

References
Index

A thoroughly updated third edition of an classic text, perfect for practical transistor design and in the classroom. It includes a variety of recent developments, reorganized chapters, and additional end-of-chapter homework exercises, making it ideal for senior undergraduate and graduate students taking advanced semiconductor devices courses.